No espere a enviar su solicitud después de leer esta descripción; se espera un gran volumen de candidaturas para esta posibilidad.
in Barcelona, Spain is seeking a Digital Verification Engineer to perform functional verification of DDR/LPDDR memory interfaces within complex ASIC/SoC designs.
You will develop and maintain SystemVerilog/UVM testbenches, debug protocol issues and drive coverage closure, ensuring functional correctness.
This is a technical execution role requiring independent problem solving and ownership of verification tasks in collaboration with RTL, architecture and firmware teams. xqbhyrx
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Hay opciones de teletrabajo/trabajo desde casa disponibles para este puesto.