Specialization: Semiconductor Design and Functional VerificationJob DescriptionOur partner is looking for a Digital Verification Engineer to perform functional verification of DDR/LPDDR memory interfaces within complex ASIC and SoC designs.You will develop and maintain SystemVerilog/UVM testbenches, debug protocol issues and drive coverage closure, ensuring functional correctness and compliance.This is a technical execution role requiring independent problem solving, ownership of verification tasks and collaboration with RTL, architecture and firmware teams.Location: Barcelona, SpainWorking model: Hybrid, 4 days in the office, 1 day from homeEmployment: Full timeResponsibilitiesPerform functional verification of DDR/LPDDR interfaces at IP and subsystem levels.Develop and maintain SystemVerilog/UVM testbenches .Verify DDR/LPDDR and AMBA protocol compliance.Debug RTL, verification model and specification mismatches.Execute regressions, investigate failures and drive bug closure.Contribute to functional coverage and verification signoff.Optimize simulation performance and automate verification workflows.Collaborate with RTL,



architecture and firmware teams.Maintain verification documentation and methodologies.Mandatory Requirements5+ years in ASIC/SoC functional verification .Recent DDR/LPDDR or comparable high speed protocol verification experience.Knowledge of AMBA protocols, including AXI, AHB, CHI or CXS.Strong SystemVerilog, UVM and coverage closure experience.Experience with VCS, Xcelium or Questa .Good RTL debugging and SoC architecture knowledge.Independent problem solving and verification task ownership.Relevant engineering degree.Important: Direct ASIC/SoC functional verification experience, including UVM development, protocol verification and coverage closure, is essential. RTL design, FPGA development or physical verification alone is insufficient.Optional / DesiredPython, Perl or TCL scripting.Git, Perforce, LSF or Grid Engine.AI tools for verification and regression analysis.Simulation performance optimization.Strong documentation and communication skills.What's in it for you?Adaptable working hoursHybrid model, 4 days office, 1 day from home1 week per year working from anywhere25 days annual leave plus December 24 and 31Monthly food allowancePrivate medical insuranceRelocation bonusHousing search supportVisa support, subject to approvalFamily relocation support, subject to eligibilityVirtual shares, subject to plan termsLanguage classesTax incentive#J-18808-Ljbffr

📌 Digital Verification Eng. - Ddr/Lpddr If Protocols (Barcelona)
🏢 Hireroo
📍 Barcelona