Job DescriptionOur partner is looking for a Lead Design Verification Engineer to lead functional verification of high speed interface protocol blocks at IP and subsystem level.The role combines hands on verification ownership with technical leadership, covering UVM environments, protocol compliance, debug, coverage closure and coordination with RTL, architecture, firmware and verification teams.Location: Barcelona, Spain, HybridLevel: LeadResponsibilities Lead IP and subsystem level functional verificationArchitect and maintain UVM verification environmentsOwn verification of PCIe, UCIe, Ser Des and related interfacesAct as protocol expert for AXI, CXS, AHB, CHI and other bus protocolsDebug RTL, DV model and specification mismatchesDrive coverage closure and sign offTriage simulation failures and drive bug resolutionOptimize simulation runtime and compile flowsDevelop scripts and verification automationGuide and support verification engineersMaintain verification methodology and technical documentation Requirements 10+ years of ASIC or So C verification experienceRecent high speed protocol verification experienceStrong PCIe, UCIe or Ser Des knowledgeDeep AXI, CXS, AHB or CHI expertiseStrong System Verilog and UVMCoverage driven verification and sign offStrong So C and digital design knowledgeVCS, Xcelium or QuestaExcellent debugging and problem solving skillsBachelor or Master degree in Electrical Engineering, Computer Engineering or related field Optional / Desired RISC V experienceAI assisted verification toolsPython, Perl or TclGit or PerforceLSF or Grid EngineStrong technical documentation and communication skills What's in it for you?

Versátil working hoursHybrid model, 4 days office, 1 day from home1 week per year working from anywhere25 days annual leave plus December 24 and 31Monthly food allowancePrivate medical insuranceRelocation bonusHousing search supportVisa support if requiredFamily relocation supportVirtual sharesLanguage classesTax incentive, subject to eligibility

📌 Lead Design Verification Engineer, High Speed Interface Protocols (Barcelona)
🏢 Hireroo
📍 Barcelona