Analog Devices, Inc. Presente su candidatura después de leer los siguientes requisitos de habilidades y cualificaciones para este puesto. is seeking a digital design engineer to join the GMSL SerDes group. You will design high-speed RTL blocks in SystemVerilog, verify with comprehensive plans, and collaborate across cross-functional teams to bring mixed-signal ICs to production. Qualifications include a Master's in EE with 8+ years in digital design, UVM background, and experience in synthesis, DFT, and Place & Route. xcskxlj Strong English communication and teamwork are essential.