09 nov
|
Confidential
|
Paterna
09 nov
Confidential
Paterna
MaxLinear in Valencia, Spain, is seeking a Principal RFIC Design Engineer to lead RF/analog/mixed-signal IC development. Si desea conocer los requisitos para este puesto, siga leyendo para obtener toda la información relevante. You will own blocks from specification through tapeout, drive architecture decisions, and influence design methodology. Strong leadership and hands-on circuit experience are essential. xcskxlj The role requires 10+ years in RFIC or analog/mixed-signal IC design, plus experience with Cadence Virtuoso/Spectre and high-volume CMOS products for wireless or data communications.
📌 Senior RFIC Architect (Paterna)
🏢 Confidential
📍 Paterna