09 nov
|
Universidade De Vigo
|
España
09 nov
Universidade De Vigo
España
Universidade de Vigo invites applications for a First Stage Researcher (R1) in the School of Telecommunications Engineering. The role centers on designing mechanical solutions for electronic equipment, translating requirements into manufacturable components, and developing 3D models with SolidWorks.
You will perform structural simulations, fabricate prototypes via additive manufacturing, and coordinate with suppliers and software teams to optimize system integration.
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📌 Mechanical design engineer: prototyping & simulation (España)
🏢 Universidade De Vigo
📍 España