The Role As a Senior Formal Verification Engineer, you will contribute to defining and leading the formal verification strategy for our systems. Responsibilities
* Work closely with system architects and design team to establish formal verification environment and setting
* Guide the use of formal verification so that correct formal techniques are used appropriately to improve efficiency of IP and SoC level verification
* Contribute to define Formal Verification Methodologies
* Produce IP level, subsystem level and chip level test plans based on Design documents and interaction with design and architecture teams
* Write and debug System Verilog assertions
* Analyze coverage data and working with Design teams to address coverage holes
* Contribute to developing framework for running regressions and debugging regression failures
* Support integration of design in higher-level subsystem including test planning, test vector delivery, and debug of test vectors at the integration level
* Scripting/Automation skills for improving workflows along with the usage of most advanced AI techniques
* Participate in project reviews
* Provide supervision/guidance to other team members Required Qualifications
* Master's degree in relevant field
* Min 5 years of experience in relevant field of Formal Verification
* A deep understanding of formal verification, including applications, verification of algorithms, protocols, and application of formal verification at SoC level




* Made significant contributions in the use of formal verification and be able to guide formal verification development into new areas
* Formal tools, System Verilog, SV Assertions and Assumptions, Scripting skills
* Apps in formal tools (Low power, X-prop, Connectivity checking, Register Map Verification)
* Design debug, Deep bug hunting
* Design knowledge of CPU, NoC/Interconnect, Memory Controllers, Caches Soft Skills
* Team player, able to work with multiple cultures both on site and remotely
* Autonomous and flexible is mandatory

What We Offer
?
* The opportunity to build a cloud AI deployment platform that will power next generation AI systems.
* A collaborative, innovation-driven environment with significant autonomy and ownership.
* Hybrid work model with adaptable scheduling.
* A chance to join one of Europe's most ambitious companies at the intersection of AI and silicon engineering.
* Position based in Barcelona, open to other European locations like Rome (Italy) We're looking for exceptional engineers ready to shape the future of AI infrastructure. If building scalable, cloud-native AI deployment platforms excites you, we'd love to meet you. At Openchip & Software Technologies S.
L., we believe a diverse and inclusive team is the key to groundbreaking ideas. We foster a work environment where everyone feels valued, respected, and empowered to reach their full potential---regardless of race, gender, ethnicity, sexual orientation, or gender identity. #J-18808-Ljbffr

📌 Senior Formal Verification Engineer (Cataluña)
🏢 Openchip & Software Technologies
📍 Cataluña