07 nov
|
OPENCHIP u0026 SOFTWARE TECHNOLOGIES
|
Barcelona
07 nov
OPENCHIP u0026 SOFTWARE TECHNOLOGIES
Barcelona
About Openchip Openchip is a European Silicon Engineering Company, headquartered in Barcelona, Spain. Our technologies will provide a value in multiple fields as Artificial Intelligence, Security and Privacy and Carbon Footprint Reduction. Our chips will be used in High Performance Computing, Autonomous Driving, Telecommunications, Personalized Medicine, Edge Computing and Cloud.
About The Function The
Network-on-chip Architecture team consists of a multi-disciplinary group involved from early product specification and analysis effort to final RTL delivery to the So Cs. One aspect of the process is to identify architecture bottlenecks and drive micro-architecture choices using performance and power analysis, and to provide the So C team with design guidelines for bus protocol compliance and best power interconnect.
Job Responsibilities As
So C Interconnect Senior Architect, you will work with a team of engineers to develop and verify state-of-the-art Memory Interface and Network-on-Chip IP cores. You will be working on advanced device architectures, design definition, implementation, and verification. In this team your responsibility will include, but not limited, to: Actively work with So C Architecture, verification, physical design team, Soc Floorplan, core teams to achieve system targets for performances, area and power.
Evaluate new IPs, driving new protocol deployments as well as defining system wide guidelines for IPs to inter-operate together in the So C. Deliver RTL to the So C team, support verification and silicon validation teams,
and work with SW teams to support successful deployments of the interconnects. Working knowledge of System on Chip and Network on Chip Architectures.
General knowledge of on-chip network protocols: General knowledge of cache coherent memory systems and interconnect. Familiarity with RISC-V architecture.
Working
Knowledge with System Verilog or Verilog, C or C++, scripting languages such as Python Hands-on experience with So C Design, Verilog RTL coding and simulation software. General knowledge of functional and performance simulators. Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification.
Full Time. Enjoy a hybrid work environment. We can offer a competitive compensation package in a versátil work schema that will help you to keep a balance between your personal and professional life. At Openchip & Software Technologies S.
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🏢 OPENCHIP u0026 SOFTWARE TECHNOLOGIES
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