07 nov
|
Openchip & Software Technologies
|
Les
07 nov
Openchip & Software Technologies
Les
Openchip & Software Technologies S. L. is seeking a Senior Formal Verification Engineer to lead the formal verification strategy across our So C platforms. You will work with system architects to establish verification environments, write System Verilog assertions, and guide the use of formal methods to improve IP and chip-level verification efficiency. You will design verification methodologies, create multi-level test plans, analyze coverage, and participate in regression frameworks and project
📌 Senior Formal Verification Engineer (Les)
🏢 Openchip & Software Technologies
📍 Les