OverviewIn this role you will advance mixed-signal verification for portable consumer products within a collaborative, multi-site team at Analog Devices.

You will shape verification strategy, develop SVRNM models, and drive test development to ensure robust AMS blocks meet device requirements.

You'll work closely with Tier 1 OEMs and senior engineers, contributing to innovations in sensing and power/back-end verification.

This is a hands-on role with opportunities to mentor and influence verification practices.

Compensaciones / Beneficiosdiscretionary performance-based bonus variable compensation paid annual leave supplemental benefits

ResponsabilidadesParticipate as a mixed-signal verification team member across Digital/Analog/DV/Implementation/Layout in a multi-site setting

Contribute to verification strategy and methodology improvements

Develop traceable AMS verification plans derived from device requirements

Code/generate SVRNM models for analog blocks and validate against schematics





Develop directed tests in AMS environments or reuse constrained random UVM testcases

File and track bugs to closure in Jira

Document results and review with the team

Requisitos principalesElectronic Engineering degree with 5+ years of chip-level AMS verification experience for SOCs

Familiarity with digital verification methodologies (DMS with UVM)

Proficiency with Cadence-based flows (schematics, simulator/netlist options)

Experience with mixed-signal simulators (Cadence AMS or equivalent)

Experience with SVRNM or Verilog-AMS models for analog blocks

Strong programming and documentation skills

Experience with scripting languages (Python, C, Perl) advantageous

Team player with strong analytical and debugging abilities

Some travel may be required team player strong analytical skills good debugging skills

Cadence-based flow

Cadence AMS

SVRNM

📌 Senior Ams Dv Engineer - Analog Devices (Valencia)
🏢 Analog Devices
📍 Valencia