Cipherbit - Grupo Oesía is seeking an RTL ASIC Engineer to design, develop and integrate high-value digital solutions for strategic projects.
You will join a multidisciplinary team focused on complex ASIC/SoC designs and verification, working across front-end and back-end flows and contributing to DFT/MBIST activities.The role involves collaboration with IPs, silicon validation and tape-out readiness.
The adecuado candidate holds a relevant engineering degree and has hands-on experience in
📌 Rtl Asic Design Engineer For Soc & Tape-Out (Madrid)
🏢 Cipherbit-Grupo Oesía
📍 Madrid
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