Senior Ethernet IP Verification Engineer (Madrid)

Senior Ethernet IP Verification Engineer (Madrid)

05 nov
|
TechTeamz
|
Madrid

05 nov

TechTeamz

Madrid

TechTeamz is seeking experienced Design Verification Engineers to join our semiconductor engineering team and tackle challenging IP and SoC verification projects. The role focuses on Ethernet IP verification across MAC, PCS, and PHY blocks, with high-speed interfaces and complex architectures. You will develop SystemVerilog/UVM testbenches, execute verification plans, drive coverage, debug failures, and collaborate with design teams to ensure robust silicon.

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📌 Senior Ethernet IP Verification Engineer (Madrid)
🏢 TechTeamz
📍 Madrid

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