Hireroo Ltd in Barcelona is seeking a Senior SoC RTL Integration Engineer to unify processor clusters, memory, accelerators and peripherals into a complete chip design.
You will own RTL integration at the SoC top level and ensure timing, clocks, resets and interfaces are ready for implementation.
The role requires 8+ years in digital/SoC design, Verilog/SystemVerilog RTL expertise, and tapeout experience.