Our projects become technology that protects, connects and drives strategic sectors: our own. At Grupo Oesía , we work to ensure that innovation has a real impact , and we are looking for people who want to be part of this challenge.

WHAT WILL YOUR MISSION BE?

You will be part of a multidisciplinary team where you will design, develop and integrate technological solutions that become part of high-value projects for our clients.

WHAT WILL YOU DO ON A DAY-TO-DAY BASIS?

- Contribute to the RTL design of complex ASIC and SoC solutions .
- Participate in digital designs based on RISC-V, ARM or equivalent architectures .
- Support the integration of third-party IPs and complex digital subsystems .
- Work within Front-End ASIC development flows and collaborate with Back-End and physical implementation teams.
- Work closely with verification engineers in environments using advanced UVM methodologies .
- Collaborate on activities related to DFT, ATPG, MBIST/LBIST and silicon validation .
- Participate in ASIC development activities leading towards tape-out and integrated circuit fabrication .
- Collaborate with multidisciplinary teams covering architecture, RTL design, verification, physical implementation and test .
- Contribute to technical decisions throughout the design and implementation stages of complex integrated circuits.

WHAT ARE WE LOOKING FOR?

- Degree in Telecommunications Engineering, Electronics, Industrial Engineering, Computer Engineering or another relevant engineering discipline.
- Professional experience in digital design within ASIC and/or SoC environments .
- Participation in one or more complete ASIC development lifecycles .
- Experience with ASIC tape-outs and integrated circuit fabrication .




- Experience working with complex SoCs based on RISC-V, ARM or equivalent architectures .
- Experience with the integration of third-party IPs and complex subsystems .
- Knowledge of Front-End and/or Back-End ASIC flows .
- Experience working in advanced verification environments using UVM methodologies .
- Knowledge of DFT, ATPG, MBIST/LBIST and silicon validation .
- Experience using industry-standard EDA environments and tools from Cadence, Synopsys or Siemens EDA .
- Experience working within multidisciplinary teams covering design, verification, physical implementation and test .

WHAT WOULD MAKE YOU STAND OUT?

- Direct participation in successful ASIC tape-outs .
- Experience working across more than one semiconductor technology node .
- Experience with semiconductor technologies between 22 nm and 65 nm .
- Experience contributing to the definition of complex SoC architectures .
- Previous experience providing technical leadership within ASIC design environments .
- Experience collaborating with foundries, design houses, technology centres and IP providers .
- Projects with a real technological impact.
- Teams where sharing knowledge is part of the job.
- Continuous professional development tailored to each role and individual.
- An environment where engineering and people move forward together.

If you are motivated by taking on new technological challenges and being part of projects that leave a lasting mark, we would be delighted to meet you.

Build your career where technology has a purpose . At Grupo Oesía, we develop dual-use digital and industrial engineering projects in strategic sectors, strengthening key capabilities for Spain and Europe from our technology centres and alongside a team of more tha

📌 RTL ASIC Engineer | Digital Design (Rivas-Vaciamadrid)
🏢 Oesía Group
📍 Rivas-Vaciamadrid