ASIC Verification (Rivas-Vaciamadrid)

ASIC Verification (Rivas-Vaciamadrid)

03 nov
|
Oesía Group
|
Rivas-Vaciamadrid

03 nov

Oesía Group

Rivas-Vaciamadrid

Our projects become technology that protects, connects and drives strategic sectors: our own. At Grupo Oesía , we work to ensure that innovation has a real impact , and we are looking for people who want to be part of this challenge.

WHAT WILL YOUR MISSION BE?

You will be part of a multidisciplinary team where you will design, develop and integrate technological solutions that become part of high-value projects for our clients.

WHAT WILL YOU DO ON A DAY-TO-DAY BASIS?

- Participate in the verification and validation of complex ASIC and SoC designs .
- Contribute to advanced functional verification activities using UVM methodologies .
- Work on the verification of complex SoCs based on RISC-V, ARM or equivalent architectures .
- Participate in the verification of third-party IPs and complex integrated subsystems .
- Collaborate with design teams throughout Front-End and Back-End ASIC development flows .
- Participate in activities related to DFT, ATPG, MBIST and LBIST .
- Contribute to silicon validation activities following ASIC tape-out and fabrication.
- Work closely with multidisciplinary teams covering architecture, RTL design, physical implementation and test .
- Participate in ASIC development activities throughout the lifecycle, from design and verification through tape-out, fabrication and silicon validation .

WHAT ARE WE LOOKING FOR?

- Degree in Telecommunications Engineering, Electronics, Industrial Engineering, Computer Engineering or another relevant engineering discipline.
- Professional experience within ASIC and/or complex SoC verification and validation environments .
- Participation in one or more complete ASIC development lifecycles .




- Experience with ASIC tape-outs and integrated circuit fabrication .
- Experience working with complex SoCs based on RISC-V, ARM or equivalent architectures .
- Experience in the integration and verification of third-party IPs and complex subsystems .
- Knowledge of Front-End and/or Back-End ASIC flows .
- Experience in advanced verification using UVM methodologies .
- Knowledge and experience in DFT, ATPG, MBIST/LBIST and silicon validation .
- Experience using industry-standard EDA environments and tools from Cadence, Synopsys or Siemens EDA .
- Experience working within multidisciplinary teams covering design, verification, physical implementation and test .

WHAT WOULD MAKE YOU STAND OUT?

- Direct participation in successful ASIC tape-outs .
- Experience working across more than one semiconductor technology node .
- Experience with semiconductor technologies between 22 nm and 65 nm .
- Experience working on the verification of complex SoC architectures .
- Previous experience providing technical leadership within ASIC verification or design environments .
- Experience collaborating with foundries, design houses, technology centres and IP providers .
- Projects with a real technological impact.
- Teams where sharing knowledge is part of the job.
- Continuous professional development tailored to each role and individual.
- An environment where engineering and people move forward together.

If you are motivated by taking on new technological challenges and being part of projects that leave a lasting mark, we would be delighted to meet you.

Build your career where technology has a purpose . At Grupo Oesía, we develop dual-use digital and industrial engineering projects in strategic sectors, strengthening key capabilities for Spain and Europe from

📌 ASIC Verification (Rivas-Vaciamadrid)
🏢 Oesía Group
📍 Rivas-Vaciamadrid

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