02 nov
|
Barcelona Supercomputing Center
|
Barcelona
02 nov
Barcelona Supercomputing Center
Barcelona
This position is at Barcelona Supercomputing Center The selection process will be entirely managed by Barcelona Supercomputing Center.
The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for EuroHPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe.
The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress.
BSC combines HPC service provision and R hardware-supported partitioning and isolation mechanisms; execution-time and resource predictability for AI workloads; memory, cache, and interconnect bandwidth management; accelerator scheduling and workload placement; power and performance configuration; hardware performance monitoring and telemetry; integration of low-level accelerator control mechanisms into system software, middleware, and runtime frameworks; experimental characterization of representative Edge AI workloads on state-of-the‑art embedded platforms.
The work will involve both experimental platform development and research-oriented prototyping, with the objective of identifying and exposing hardware and system-software mechanisms that enable predictable and controllable execution of AI workloads at the edge.
Candidates are required to exhibit a background in embedded systems and familiarity with both hardware and software analysis and configuration.
Applicants are expected to hold an engineering degree in fields related to embedded systems, computer architecture, or closely related areas.
The position offers opportunities to collaborate with research institutions and industrial stakeholders across several European locations, providing a stimulating environment for professional growth,
knowledge exchange, and hands‑on research experience.
Key Duties
Contribute to the research on advanced configuration and control mechanisms for GPUs, NPUs, and other hardware accelerators available in state-of-the‑art Edge AI platforms
Analyze hardware and system-software interfaces for resource allocation, partitioning, scheduling, monitoring, and performance management
Contribute to system-level, application level, and containerization level solutions to improve non-functional metrics like execution time and resilience to hardware faults
Develop low-level prototype software components, tools, and APIs to expose accelerator configuration and observability capabilities
Document technical results and contribute to scientific publications, project deliverables, demonstrations, and presentations
Collaborate with a small team of researchers and industrial partners working on embedded systems, AI acceleration, automotive computing, and software‑defined platforms
Requirements
Education: Engineering degree or Master Degree in Computer Science, Computer Architecture, or a related field
Essential Knowledge and Professional Experience: Previous experience running AI workloads on embedded targets with accelerators like NPU and GPU Performance, heat, power consumption analysis of benchmarks running on embedded workloads
Good programming skills in C/C++
Solid knowledge of Linux systems programming
Familiarity with computer architecture and heterogeneous computing platforms
Experience working with embedded or edge‑computing platforms
Ability to perform experimental performance analysis and benchmarking
Familiarity with scripting and automation tools, preferably Python and shell scripting
Additional Knowledge and Professional Experience: Embedded AI platforms such as NVIDIA Jetson/Orin, NXP iMX8, Qualcomm, AMD, Intel, or ARM-based SoCs
Familiarity with Neural Processing Units and dedicated AI accelerators
Linux kernel interfaces, device drivers, ioctl, MMIO, or low-level hardware interfaces
Experience in programming and collecting hardware performance counters and accelerator telemetry
Competences: Problem-solving, pro-active, result-oriented work attitude
Good communication skills including a good command of the English language (written and spoken)
Good technical English and ability to work with technical documentation and research literature
Conditions The position will be located at BSC within the Computer Sciences Department
We offer a full-time contract (35h/week), a good working environment, a highly stimulating environment with state-of-the‑art infrastructure, versátil working hours, extensive training plan, restaurant tickets, private health insurance, support to the relocation procedures
Duration: Open-ended contract due to technical and scientific activities linked to the project and budget duration
Holidays: 22 days of holidays + 6 personal days + 24th and 31st of December per our collective agreement
Salary: we offer a competitive salary commensurate with the qualifications and experience of the candidate and according to the cost of living in Barcelona
Starting date: November
Employer and Equal Opportunity Statement BSC-CNS is an equal opportunity employer committed to diversity and inclusion.
We are pleased to consider all qualified applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or any other basis protected by applicable state or local law.
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📌 Research Engineer – Advanced Configuration Of Edge Ai Accelerators (Re1) (Barcelona)
🏢 Barcelona Supercomputing Center
📍 Barcelona