02 nov
|
Capgemini Engineering
|
Madrid
02 nov
Capgemini Engineering
Madrid
Responsible for physical design activities, including floorplanning, placement, routing, and timing closure for complex ASIC designs on advanced technology nodes. Requires 6+ years of experience and proficiency in Synopsys/Cadence tools.
📌 Physical Design Engineer - Early In Career (Madrid)
🏢 Capgemini Engineering
📍 Madrid