Principal Rfic Design Engineer (Chirivella)

Principal Rfic Design Engineer (Chirivella)

01 nov
|
Max Linear
|
Chirivella

01 nov

Max Linear

Chirivella

MaxLinear in Valencia, Spain, is seeking a Principal RFIC Design Engineer to lead RF/analog/mixed-signal IC development. You will own blocks from specification through tapeout, drive architecture decisions, and influence design methodology. Strong leadership and hands-on circuit experience are essential. The role requires 10+ years in RFIC or analog/mixed-signal IC design, plus experience with Cadence Virtuoso/Spectre and high-volume CMOS products for wireless or data communications.

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📌 Principal Rfic Design Engineer (Chirivella)
🏢 Max Linear
📍 Chirivella

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