01 nov
|
Oesía Group
|
Rivas-Vaciamadrid
01 nov
Oesía Group
Rivas-Vaciamadrid
DFT ASIC / SoC Engineer (Integral opportunity)
Our projects become technology that protects, connects and drives strategic sectors forward: our sectors. At Grupo Oesía, we work to ensure that innovation has a real impact, and we are looking for people who want to be part of this challenge.
WHAT WILL YOUR MISSION BE?
You will be part of a multidisciplinary team where you will design, develop and integrate technological solutions that become part of high-value projects for our clients.
WHAT WILL YOU DO IN YOUR DAY-TO-DAY?
- Design and implement Design for Test (DFT) strategies for ASIC circuits and SoC systems.
- Develop test and diagnostic structures for integrated circuits, such as scan chains, MBIST or LBIST.
- Participate in test pattern generation and validation activities (ATPG).
- Collaborate with design, verification and physical implementation teams.
- Analyse coverage metrics and optimise test solutions throughout the development process.
- Support silicon validation and manufacturing activities.
WHAT ARE WE LOOKING FOR?
- Bachelor's or Master's degree in Electronic Engineering, Telecommunications Engineering, Industrial Engineering or a related field.
- At least 3 years of experience in DFT (Design for Test) for ASICs or SoCs.
- Knowledge of scan insertion, ATPG, MBIST and/or LBIST.
- Experience with EDA tools (Cadence, Synopsys).
- Highly valued: experience in complete ASIC development cycles, silicon validation and bring-up, and knowledge of ARM, RISC-V and SoC architectures.
- Projects with real technological impact.
- Teams where sharing knowledge is part of the way we work.
- Continuous professional development tailored to each profile and individual.
- An environment where engineering and people move forward together.
If you are motivated by new technological challenges and want to be part of projects that make a difference, we would love to meet you.
Develop your career where technology has a purpose. At Grupo Oesía, we develop dual-use digital and industrial engineering projects across strategic sectors, strengthening key capabilities for Spain and Europe from our technology centres and alongside a team of more than 3,800 professionals across Spain, Brussels, Latin America and Asia.
Grupo Oesía is a Spanish multinational company dedicated to dual-use digital and industrial engineering, developing and implementing projects worldwide.
At Grupo Oesía we believe in diversity and equal opportunities as drivers of innovation, and in inclusion as the foundation for growth. We foster an environment where everyone, without any distinction, can develop their talent and contribute to building a better future.
Cipherbit-Grupo Oesía is the first Spanish brand specifically dedicated to cybersecurity and the development of secure communication products (encryption), certified by the CCN and NATO.
This division of Grupo Oesía is focused on the national and international environment of Armed Forces, Public Administrations, and critical infrastructures, thereby reinforcing Europe's strategic autonomy in cyber defense.
With nearly 50 years of experience, we have developed products and services that already benefit millions of people across healthcare, security and defence, space, telecommunications, finance, logistics and the agri-food sector. But what truly sets us apart are the
Our projects become technology that protects, connects and drives strategic sectors forward: our sectors. At Grupo Oesía, we work to ensure that innovation has a real impact, and we are looking for people who want to be part of this challenge.
WHAT WILL YOUR MISSION BE?
You will be part of a multidisciplinary team where you will design, develop and integrate technological solutions that become part of high-value projects for our clients.
WHAT WILL YOU DO IN YOUR DAY-TO-DAY?
- Design and implement Design for Test (DFT) strategies for ASIC circuits and SoC systems.
- Develop test and diagnostic structures for integrated circuits, such as scan chains, MBIST or LBIST.
- Participate in test pattern generation and validation activities (ATPG).
- Collaborate with design, verification and physical implementation teams.
- Analyse coverage metrics and optimise test solutions throughout the development process.
- Support silicon validation and manufacturing activities.
WHAT ARE WE LOOKING FOR?
- Bachelor's or Master's degree in Electronic Engineering, Telecommunications Engineering, Industrial En
📌 DFT ASIC (Rivas-Vaciamadrid)
🏢 Oesía Group
📍 Rivas-Vaciamadrid