Capgemini Engineering is seeking a Senior Physical Design Engineer to drive physical design activities from floorplanning through sign-off and tape-out on advanced technology nodes. You will lead CTS, routing, power planning, and timing closure for large ASICs and work with multi-disciplinary teams across design stages.
The adecuado candidate has 6+ years of ASIC physical design experience, proficiency with Synopsys/Cadence tools, strong scripting skills, and hands-on experience with ECO generation