Aion Silicon Ltd in Barcelona, Spain seeks a Senior Methodology Engineer to lead RTL-to-Signoff physical design automation and quality systems for complex SoC/ASIC projects. You will build scalable automation frameworks and improve silicon delivery across advanced nodes.
The role combines hands-on EDA tool experience (Cadence Innovus, Tempus, Voltus, Pegasus) with software skills (Python, Tcl, Perl, Shell, C++), and requires strong problem solving and cross-team collaboration.