Are you a problem solver looking for a hands-on internship position with a market-leading company that will help develop your career and reward you intellectually and professionally?

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At ADI, you will learn from the brightest minds who are here to help you grow and succeed. During your internship, you will make an impact through work on meaningful projects alongside a team of experts. Collaborating with colleagues in an environment of respect and responsibility, you will create connections that will become a part of your professional network.

ADI’s culture values aligned goals, work-life balance, continuous and life-long learning opportunities, and shared rewards. The internship program features various lunch-and-learn topics and social events with other interns and full-time employees.

At ADI, our goal is to develop our interns so they are the first to be considered for full-time roles.

Apply now for the opportunity to grow your career and help innovate ahead of what’s possible.

IC Layout Engineer Intern

CUSTOM SILICON SOLUTIONS | IC LAYOUT

Internship Position Overview

Join the Custom Silicon Solutions (CSS) IC Layout team and gain practical experience working alongside experienced layout and circuit design engineers.

The successful candidate will learn how transistor-level circuit designs are translated into physical integrated circuit layouts and how layout decisions can affect circuit performance, area, reliability and manufacturability.

The intern will work as part of an international,



cross-functional engineering team developing analogue and mixed-signal integrated circuits using advanced semiconductor technologies.

Job Responsibilities

Learn IC layout methods by working as part of a cross-functional team that includes IC Layout and IC Design engineers. Explore analogue IC layout methods and techniques using industry-standard design and verification tools. Translate block-level circuit designs into physical layouts and learn how layout can affect circuit performance. Gain experience with physical verification techniques, including Design Rule Checking (DRC) and Layout Versus Schematic (LVS). Document work clearly and present findings for peer review. Specific responsibilities will be tailored to the candidate's interests and the needs of the team.

Requirements

Pursuing a Bachelor's or Master's degree in Electrical Engineering, Electronic Engineering or an equivalent discipline. Knowledge of semiconductor device physics and fabrication processes is an advantage. Experience using Cadence Virtuoso or a similar IC layout tool is an advantage. Familiarity with the interpretation and debugging of physical verification results, including DRC and LVS, is an advantage. Strong attention to detail and an organised approach to engineering work. A motivated and creative problem solver with good technical writing, presentation and communication skills. Self-motivated, thorough and committed to continuous improvement. Willing and able to learn new tools, technologies and engineering concepts quickly. Job Req Type: Internship/CooperativeRequired Travel: No

📌 Layout Designer Intern (Valencia)
🏢 Analog Devices
📍 Valencia