The TMRW Foundation SILICON in Barcelona, Spain, is seeking a Digital IC Designer to develop, simulate, and verify complex digital ICs. You will work on RTL coding using Verilog/VHDL and ensure designs meet performance, power, and area targets. The role requires hands-on experience with Cadence EDA tools (Genus, Innovus, Tempus, Virtuoso), strong collaboration with cross-functional teams, and clear technical documentation to support tape-out and fabrication readiness. #J-18808-Ljbffr
📌 Senior Digital IC Designer — Cadence (Comunidad de Madrid)
🏢 TMRW
📍 Comunidad de Madrid
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