Overview In this role, you develop and verify logic IPs (standard cells and IOs) to support SOC designs across analog, digital and mixed-signal domains. You will work within the Foundation IP group to enable robust library content used in design, routing, and P&R; flows. You will refine library QA processes, debug issues, and automate tasks through scripting. You’ll collaborate with cross-functional teams to drive reliable, scalable IPs that power advanced systems. This is a hands-on position in a fast-paced, innovation-driven environment that values clear communication and practical problem-solving. Responsabilidades * Logic cell and IO circuit design, simulation and layout creation * Library characterization * Library view generation for digital,



analog and mixed-signal design and PnR flows * Library QA methodology development and execution * Debugging library and design issues * Programming and scripting for automation Requisitos principales * 3+ years of experience * Masters degree in Electrical Engineering or equivalent * Strong knowledge on circuit design, simulations and characterization * Strong knowledge on library view development and verification * Familiar with analog, digital and mixed-signal design flows * Good at programming or scripting * Strong written and verbal communication skills * communication skills * circuit design, simulations and characterization * library view development and verification * analog, digital and mixed-signal design flows * programming or scripting

📌 Foundation IP Development Engineer (Valencia)
🏢 Analog Devices
📍 Valencia