17 oct
|
Grupo Oesia
|
Pontevedra
17 oct
Grupo Oesia
Pontevedra
Overview As a Programmable Logic Engineer, you will design and verify complex FPGA-based solutions to meet project requirements. You will work within Madrid to develop synthesizable VHDL, integrate AXI-based interfaces, and verify designs using industry tools. You’ll trace requirements with DOORS and validate through testbenches and simulators. You’ll collaborate with cross-functional teams to deliver robust hardware for embedded systems and real-time applications. Responsabilidades * Requirements specification and traceability using DOORS * Design and verification of synthesizable VHDL code * Verification of logic with VHDL testbenches and ModelSim * Interface design for UART, SPI, I2C * FPGA development with Xilinx Zynq and Ultrascale; Vivado design and IP cores * AXI bus implementation and Chipscope-based analysis * XSCT scripting and SDK-based standalone applications Requisitos principales * Knowledge of synthesizable VHDL * Experience with Zynq and UltraScale FPGAs * Experience with Vivado design environment * DOORS * ModelSim * VHDL * UART * SPI * I2C
📌 Ingeniero/a lógica programable (Pontevedra)
🏢 Grupo Oesia
📍 Pontevedra