13 oct
|
Oesía Group
|
Madrid
13 oct
Oesía Group
Madrid
Oesia Group in Spain is seeking an FPGA Engineer to join a major project in Rivas Vaciamadrid, with a hybrid work model. The idóneo candidate has at least 4 years of experience and strong VHDL synthesis and verification skills.
You'll work with Zynq and Ultrascale+ FPGAs, develop AXI-based IP cores, and perform RTL verification and Xilinx tool flows (XSCT/Modelsim). The role offers multinational environment and ongoing professional growth.
J-18808-Ljbffr
📌 Hybrid FPGA Engineer – VHDL, AXI, Zynq/Ultrascale+ (Madrid)
🏢 Oesía Group
📍 Madrid