Senior Verification Engineer – Next-Gen Risc-V Cpus (Uvm) (Distrito del Ensanche)

Senior Verification Engineer – Next-Gen Risc-V Cpus (Uvm) (Distrito del Ensanche)

12 oct
|
European tech
|
Distrito del Ensanche

12 oct

European tech

Distrito del Ensanche

A European tech company in Barcelona is seeking a Senior Verification Engineer to ensure their next generation of silicon meets quality standards. You will develop UVM-based testbenches, define verification plans, and automate workflows. The ideal candidate has 8+ years of experience in digital design verification, strong scripting skills, and English fluency. This is a permanent position offering competitive compensation and adaptable working hours.#J-18808-Ljbffr

📌 Senior Verification Engineer – Next-Gen Risc-V Cpus (Uvm) (Distrito del Ensanche)
🏢 European tech
📍 Distrito del Ensanche

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