At Oesia Group, we are growing We would like to count on you for our next job offer: We are looking for a Chief FPGA & SoC Architect (PL) to join an important Project located in Madrid.
What are we looking for?

An/a FPGA Architect (PL) - Relocation to Spain, with at least 7 years of experience.
Availability to join a stable project in Madrid

Requirements

Degree in Telecommunications, Electronics, Industrial, Aerospace Engineering, or similar.
Highly valued: Master’s degree or specialization in high‑reliability digital design is highly valued.
≥10 years in FPGA/SoC design and verification within high‑criticality sectors
≥3 years leading teams or acting as technical authority in projects.
Proven experience in the design of systems or components from leading manufacturers in aerospace and defense environments (DAL A/B/C or equivalent requirements).
Proficiency in: Verification: UVM, test environments, coverage methodologies and tools like Vivado, ModelSim/Questa, Libero SoC.

What will your responsibilities be?





Provide support and validation for functional and structural FPGA/SoC architectures within aerospace and defense components and systems.
Act as technical authority, responsible for key design decisions, trade-offs, and critical reviews throughout the product design and development lifecycle.
Compliance with Aerospace/Defense Standards and Regulatory Frameworks such as DO‑254, DO‑160, MIL‑STD‑461 (EMI/EMC), MIL‑STD‑810, ECSS‑Q‑ST‑60‑02, EN9100 / ISO 9001, RTCA/EASA.
Lead FPGA engineering, digital verification, HW/SW integration, and validation teams. Ensure adherence to best practices in RTL.
Transfer technical expertise, mentor engineers, and establish internal design and verification standards.
Ensure adherence to best practices in RTL design, documentation, and configuration management.
Simulation models, testbenches, and UVM environments and High‑integrity RTL code (VHDL/Verilog/SystemVerilog).
Validate V&V; plans, requirement matrices, and coverage metric

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