11 oct
|
Aistech Space
|
Barcelona
11 oct
Aistech Space
Barcelona
Aistech Space in Barcelona seeks an expert FPGA Design Engineer to lead next‑gen image acquisition payloads. You’ll architect the digital brain, transforming raw high‑speed sensor data into actionable insights using VHDL and hardware acceleration.
Es esencial asegurarse de que cumple con los requisitos como solicitante para este puesto; por favor, lea atentamente la información a continuación.
You will manage data flow from FPGA pins to AI engines, integrate DMA streams, and ensure timing closure. xghoner Join a cross‑functional, agile team and contribute to documentation and blogs.
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📌 FPGA Design Engineer — AI-Powered Space Payloads (Barcelona)
🏢 Aistech Space
📍 Barcelona