Responsible for the verification of CPU/GPU core memory subsystems, including Load/Store Units, data caches, and bus interfaces, ensuring RTL freeze to tapeout-quality sign-off. Requires SystemVerilog/UVM and RISC-V ISA knowledge.
📌 Senior Verification - Lsu (Load/Store Unit) And Data Cache (Barcelona)
🏢 Akuaro
📍 Barcelona
Postulate a este anuncio
Muestra tus habilidades a la empresa, rellenar el formulario y deja un toque personal en la carta, ayudará el reclutador en la elección del candidato.