Job DescriptionOur partner is looking for aSenior DDR Design Engineerto design, develop and integrate high performance memory subsystem solutions for advanced semiconductor products.You will work closely with architecture, RTL, verification and implementation teams on memory controller design, interface integration, timing and validation. The role requires strong ownership of memory subsystem development and the ability to support designs from architecture through implementation and tape out.Location:Barcelona, Spain, HybridLevel:SeniorResponsibilitiesDesign and integrate DDR or HBM memory subsystemsDevelop and integrate memory controllers within SoC environmentsImplement and review RTL using Verilog or VHDLWork with AXI based interfaces and system integrationTranslate architecture requirements into robust memory subsystem designsApply timing constraints and support timing analysis and closurePerform block level testing and validationDebug memory subsystem and interface issuesCollaborate with architecture,
RTL and verification teamsSupport integration through implementation and tape outContribute to design reviews and technical decisionsRequirements8+ years of relevant industry experienceStrong DDR or HBM memory experienceProven memory controller design or integration experienceStrong knowledge of AXI protocolRTL design using Verilog or VHDLExperience with timing and timing constraintsBlock level testing and validationUnderstanding of SoC memory subsystem integrationStrong debugging and problem solving skillsAbility to work across architecture, RTL and verification teamsOptional / DesiredRISC V architecture experienceMaster or PhDPython, Perl, Bash or TclGit or SVNParticipation in2 successful tape outsExperience with complex SoC memory subsystemsExperience supporting timing closure and integrationBroader knowledge of memory architecture and system performanceWhat’s in it for you?Adaptable working hoursHybrid model, 4 days office, 1 day from home1 week per year working from anywhere25 days annual leave plus December 24 and 31Monthly food allowancePrivate medical insuranceRelocation bonusHousing search supportVisa support if requiredFamily relocation supportVirtual sharesLanguage classesTax incentive, subject to eligibility#J-18808-Ljbffr
📌 Ddr Design Engineer (Madrid)
🏢 Hireroo
📍 Madrid
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