Graph Neural Networks (GNNs) have become the model of choice for processing non‑Euclidean data in applications such as robotics, smart‑grid monitoring and real‑time anomaly detection. Deploying them on resource‑constrained edge devices remains a major challenge because of a structural dichotomy inside every GNN layer: an irregular, memory‑bound neighbourhood aggregation phase followed by a dense, compute‑bound feature transformation phase. Conventional edge CPUs and GPUs cannot bridge this gap efficiently and end up memory‑bottlenecked, with their compute logic idle.
This thesis proposes a heterogeneous hardware‑software co‑design framework for low‑precision GNN inference and training at the edge, splitting the workload across the two domains of an adaptive compute acceleration platform (AMD Versal AI Edge). The SGRACE accelerator framework, adapted to the programmable logic, will orchestrate the irregular dataflows, sparse memory accesses and variable 1‑to‑8‑bit quantisation of GNN layers, including graph attention and graph transformer layers.



Dense computation will be streamed to the hardened, high‑frequency AI Engine‑ML vector array through the network‑on‑chip and AXI stream interfaces. Exploiting the native sub‑byte vector capabilities of the AI Engines together with arbitrary‑precision spatial pipelines in the fabric opens the way to dynamic precision scaling across layers and phases, both for inference and for on‑device training.
The anticipated results are twice the energy efficiency (TOPS/W) of current edge hardware and deterministic sub‑millisecond latency, delivering scalable, deployment‑ready architectures for next‑generation intelligent edge systems.
Research objectives
SGRACE‑based aggregation engine in programmable logic with arbitrary 1‑to‑8‑bit precision and support for graph attention and graph transformer layers.Dense transformation kernels on the AI Engine‑ML array with sub‑byte vectorisation and a PL‑to‑AIE streaming dataflow.Dynamic precision s

📌 Co-Designing Scalable Low-Precision Graph Neural Networks for Inference and Training at the Edge with Heterogeneous Hardware (Madrid)
🏢 HiPEAC
📍 Madrid