Senior Verification Engineer - Memory Subsystem & Cache (Madrid)

Senior Verification Engineer - Memory Subsystem & Cache (Madrid)

08 oct
|
Hireroo
|
Madrid

08 oct

Hireroo

Madrid

Hireroo Ltd. in Barcelona, Spain, seeks a Senior Verification Engineer to own LSU verification of a processor core, memory ordering, cache, TLB interactions, and related bus interfaces.You will lead planning through sign-off, collaborating with architecture, RTL and other verification teams. The role is hybrid in Barcelona, with senior-level responsibilities including testbench development, coverage closure, defect analysis and mentoring of juniors.#J-18808-Ljbffr

📌 Senior Verification Engineer - Memory Subsystem & Cache (Madrid)
🏢 Hireroo
📍 Madrid

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