You will own signal integrity end to end — from silicon package, through the board, to the system channel. Senior IC role with architectural influence: you won't be handed a closed spec to verify, you'll help define it.
What you will work on:
- Full-wave extraction and SI closure for a multi-die AI accelerator package
- PCIe Gen6 (PAM4) channel design and compliance margining
- LPDDR6 interface design, timing budget and bus-level closure
- SI ownership on a rack-scale system: backplane, connectors, cabling and interconnect

Responsibilities:
- Budgets & feasibility: Define and hold loss, crosstalk and jitter budgets across die, package, board and channel. Run pre-layout feasibility studies that shape escape routing, stackup and layer assignment before layout is committed.
- Extraction & simulation: Perform 3D full-wave and hybrid extraction of package and board structures, defining port and reference conventions. Run statistical and time-domain channel simulation with IBIS-AMI, interpreted FEC-aware for Gen6.
- Model quality: Own passivity, causality,



reciprocity and DC accuracy gates on every model entering the flow.
- Vendor & validation: Define SI requirements in package vendor and OSAT statements of work. Drive model and characterisation requirements with IP, PHY, DRAM and package vendors. Correlate against VNA, TDR and on-die margin scans, and support board bring-up.

Requirements:
- 8+ years in signal integrity for high-speed digital systems, including package-level work
- Hands-on with at least one 3D EM extraction suite — Ansys HFSS/SIwave, Cadence Clarity/Sigrity, Keysight or equivalent
- Proven closure on a multi-gigabit SerDes (PCIe Gen5/Gen6 or comparable) and a wide parallel memory interface (DDR5, LPDDR5/6 or HBM)
- Working knowledge of IBIS, IBIS-AMI and channel simulation methodology
- Comfortable reading a package substrate stackup and bump map, and reasoning about what the physics will do
- Python scripting for automation and post-processing

Nice

📌 Senior Signal Integrity Engineer (España)
🏢 Semidynamics
📍 España