07 oct
|
Semidynamics
|
Barcelona
07 oct
Semidynamics
Barcelona
Semidynamics is seeking a Senior Memory Design Engineer to design and develop memory subsystem solutions for our semiconductor portfolio. You will work within the Memory Design Team and closely with other teams to create efficient, high-performance memory subsystems that power modern designs.
The role requires +8 years industrial experience, knowledge of DDR/HBM, AXI protocol, and RTL design in Verilog/VHDL, with a focus on timing and basic block-level testing.
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📌 Senior Memory Design Engineer (DDR/HBM) – Hybrid (Barcelona)
🏢 Semidynamics
📍 Barcelona