07 oct
|
Brainlab Fira
|
Madrid
07 oct
Brainlab Fira
Madrid
IC Electronic & Telecom Systems Engineer
Fixed-term R&D; project contract (12 - 24 months, with possibility of extension)Full-time – 40 h/weekAbout the project
TARRANIX is a cutting-edge R&D; initiative focused on developing next-generation photonic integrated circuits (PICs) for sustainable photonic computing. The project combines nanofabrication, photonic design, computing and photonics within a multidisciplinary team of physicists, engineers, and material scientists.Role Overview
We are building the electronic layer that interfaces with the Tarranix fully photonic ALU. Your mission is to design the mixed-signal, reconfigurable, and embedded systems that drive on-chip lasers/modulators and read out multi-state optical logic. You will create the ELECTRONIC validation SoC: a small RISC-V–based calculator-style platform that tests and demonstrates our optical gates.This role bridges telecom-grade optoelectronics, IC design, mixed-signal engineering, and FPGA-based control—a core position in shaping the first hybrid photonic processor.KEY RESPONSIBILITIES
Design the electronic–photonic interface layer (laser/SOA drivers, modulator drivers, TIAs, ADCs,
comparators).Develop E/O and O/E transduction for 1550 nm systems.Build FPGA-based control logic for modulation, timing, and multi-level photonic readout.Integrate an ELECTRONIC RISC-V SoC (peripherals, memory-mapped photonic ALU interface, firmware).Design mixed-signal PCBs / IC blocks ensuring clean analog + high-speed behavior.Prototype the optical calculator demonstrator (keyboard, display, firmware).Collaborate with photonics, metasurface, and nanofab teams to co-design the general architecture.WHAT SUCCESS LOOKS LIKE
A working electronics wrapper enabling full optical ALU execution.A functional electronic RISC-V calculator demonstrator powered internally by photonic logic.Stable, repeatable E/O + O/E transduction supporting Tarranix multi-state gates.Seamless collaboration with photonics and materials teams to evolve the full processor.POSITION DETAILS
10% Bonus by objectives. Private fitness center and other amenities.Access to advanced research infrastructure and external cleanroom laboratories.Participation in an international, interdisciplinary research environment.Opportunities for professional growth and scientific contribution in a pioneering photonics project.
#J-18808-Ljbffr
📌 IC Electronic & Telecom Systems Engineer (Madrid)
🏢 Brainlab Fira
📍 Madrid