06 oct
|
Semidynamics
|
Barcelona
06 oct
Semidynamics
Barcelona
Semidynamics seeks a Design Verification Engineer to lead subsystem and IP‐level verification for high‐speed interfaces in AI chips. You will guide a team of verification engineers, coordinating with RTL, So C architecture, firmware, and other DV teams to deliver sign‐off quality designs. The role requires hands‐on leadership, deep technical expertise, and cross‐functional collaboration in a hybrid setup with four days in Barcelona and one day WFH.
📌 Hybrid: lead design verification engineer for ai chip socs (Barcelona)
🏢 Semidynamics
📍 Barcelona