Semidynamics is seeking an experienced LSU verification engineer to own the verification plan for a Load/Store Unit in a CPU/GPU core. You will drive RTL freeze to tapeout‑quality sign‑off and mentor junior engineers while collaborating with DV leads.
You will build UVM testbenches, develop constrained tests for memory ordering and forwarding, and push formal verification to strengthen coverage. Barcelona hybrid role with integral collaboration.
📌 Senior LSU Verifier (Barcelona)
🏢 Semidynamics
📍 Barcelona
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