05 oct
|
Flir
|
Andalucía
Teledyne Sevilla invites engineers to join a team focused on high-performance analog and mixed-signal systems. You will contribute across architecture definition, transistor-level design, and silicon verification, using HDL and CADENCE tools. The role emphasizes hands-on design work, collaboration, and international opportunities within Teledyne Group. Applicants should have a strong background in analog IC design, DSP, and CMOS, plus a solid track record with Cadence tools.
📌 Senior Hybrid Analog/Mixed-Signal IC Design Engineer (Andalucía)
🏢 Flir
📍 Andalucía