05 oct
|
Semidynamics
|
Santander
05 oct
Semidynamics
Santander
Semidynamics in Barcelona is seeking an experienced STA & Synthesis Lead Engineer with hands-on RTL-to-gate synthesis, MMMC timing analysis, and SDC constraint development to drive sign-off from RTL through implementation. You will collaborate with RTL, DFT, and Physical Design teams to optimize PPA, resolve timing bottlenecks, and deliver robust, area-efficient designs in a hybrid work setting (4 days in office, 1 day WFH). #J-18808-Ljbffr
📌 Senior synthesis & timing lead engineer (Santander)
🏢 Semidynamics
📍 Santander