Hireroo Ltd is seeking a Lead Design Verification Engineer in Barcelona to lead functional verification of high-speed interface protocol blocks at IP and subsystem levels. The role blends hands-on verification with technical leadership across RTL, architecture, firmware and verification teams. You will architect and maintain UVM environments, own verification of PCIe/UCIe/Ser Des, and act as protocol expert for AXI, CXS, AHB, CHI. #J-18808-Ljbffr
📌 Lead high-speed verification engineer – pcie/ucie (Barcelona)
🏢 Hireroo
📍 Barcelona
Postulate a este anuncio
Muestra tus habilidades a la empresa, rellenar el formulario y deja un toque personal en la carta, ayudará el reclutador en la elección del candidato.