SelectLevel ID: PFSB-2 Description Role Overview Semidynamics is seeking a Senior LPDDR5X Controller/PHY First-Silicon Bring-Up Engineer to support reconstruction, implementation and physical qualification of the LPDDR5X Controller/PHY initialization and training flow, taking controlled verification collateral through to deterministic first-silicon execution and failure diagnosis. Why Semidynamics? * Work for one of Europe's most promising deep-tech semiconductor scale-ups. * Accelerated development path. * 4 days per week in the Barcelona office (city center), 1 day WFH. * 1 week of work from everywhere in the world. * Competitive package. * A collaborative, technical, and growth-oriented environment that values direct ownership and clear thinking. Requirements Required experience * Demonstrable DDR/LPDDR post-silicon bring-up experience; LPDDR5/LPDDR5X experience is strongly preferred. * Strong understanding of memory-controller and PHY initialization, DRAM mode registers, timing configuration and frequency operating points. * Hands-on experience with PHY initialization firmware,
mailbox/status flows, calibration and training procedures. * Experience diagnosing training failures and separating controller, PHY, DRAM, clock, reset and board-level causes. * Low-level C/C++ firmware development and direct MMIO/register access. * Ability to translate ordered verification sequences into deterministic executable firmware with readback, polling and bounded timeout handling. * Understanding of memory read/write sanity testing and the transition from training PASS to a usable memory configuration. * Practical laboratory experience during physical first-silicon memory bring-up. Strongly preferred * Direct experience with Cadence DDR/LPDDR Controller and PHY IP. * Experience with Cadence PHY firmware/training flows or comparable commercial DDR PHY solutions. * LPDDR5X frequency switching, training checkpoints and known-good configuration capture. * Experience with first CPU-v