30 sep
|
Analog Devices
|
Valencia
30 sep
Analog Devices
Valencia
Analog Devices, Inc. is seeking a Senior Physical Design Engineer to own end-to-end physical implementation and signoff of digital blocks and SoCs in Valencia. You will collaborate with a distributed engineering team to deliver high-quality RTL-to-GDSII results and drive design closure.
You should have hands-on experience with Cadence or Synopsys flows, and a strong background in timing, DRC/LVS, and floorplanning. Excellent communication and ownership are required.
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📌 Senior Physical Design Engineer: RTL-to-GDSII & Timing (Valencia)
🏢 Analog Devices
📍 Valencia