30 sep
|
Semidynamics
|
Gerona
30 sep
Semidynamics
Gerona
Semidynamics is seeking a static formal verification lead to ensure functional correctness and low-power intent across the design lifecycle. You will drive RTL-to-Gate and Gate-to-Gate equivalence checks, debug LEC failures, and guarantee convergence across synthesis, place-and-route, and ECO cycles. xugodme
Maximice sus posibilidades de que su candidatura sea seleccionada asegurándose de que su CV y sus habilidades se ajustan al perfil.
You will collaborate with RTL, Synthesis, DFT, and Physical Design teams to resolve design mismatches, perform ECO validation, and develop automation for LEC sign-off.
📌 Senior Formal Verification Lead - RTL/Power Convergence (Gerona)
🏢 Semidynamics
📍 Gerona