Experteer Overview

Aunque la experiencia profesional y las cualificaciones son clave para este puesto, asegúrese de comprobar si posee las habilidades interpersonales preferibles antes de solicitar, si se requieren.

In this role, you develop and verify logic IPs (standard cells and IOs) to support SOC designs across analog, digital and mixed-signal domains. You will work within the Foundation IP group to enable robust library content used in design, routing, and Pu0026amp;R flows. You will refine library QA processes, debug issues, and automate tasks through scripting.

You’ll collaborate with cross-functional teams to drive reliable, scalable IPs that power advanced systems. This is a hands-on position in a fast-paced, innovation-driven environment that values clear communication and practical problem-solving.

Compensaciones / Ventajas

- Logic cell and IO circuit design,



simulation and layout creation
- Library characterization
- Library view generation for digital, analog and mixed-signal design and PnR flows
- Library QA methodology development and execution
- Debugging library and design issues
- Programming and scripting for automation

Responsabilidades

- 3+ years of experience
- Master's degree in Electrical xugodme Engineering or equivalent
- Strong knowledge on circuit design, simulations and characterization
- Strong knowledge on library view development and verification
- Familiar with analog, digital and mixed-signal design flows
- Good at programming or scripting
- Strong written and verbal communication skills

Requisitos principales

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📌 Foundation IP Development Engineer (Castellón de la Plana)
🏢 Analog Devices
📍 Castellón de la Plana