28 sep
|
GMV
|
Tres Cantos
GMV in Madrid is seeking a Senior Hardware Design Engineer specializing in FPGA/SoC. You will lead FPGA development, architecture definition, and mentor junior engineers in a fast‑paced environment.
You will work in a hybrid model with some travel across Europe for tests and meetings. Proficiency in VHDL/Verilog, SystemVerilog/UVM, and FPGA toolchains is required, with coding in C++ or Rust and Python beneficial.
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📌 Senior FPGA Design Engineer – Hybrid, Relocation (Tres Cantos)
🏢 GMV
📍 Tres Cantos