Overview In this role you will lead FPGA/SoC hardware design projects within GMV’s space sector, driving architecture definition and system optimization. You will work closely with a cross-functional team, mentoring junior engineers and shaping critical hardware solutions. Expect hands-on work with architecture, HDL coding, and advanced verification to meet stringent performance and reliability needs. You will collaborate across locations, contributing to system-level optimization and documentation. This is an opportunity to influence high-impact space hardware and grow as a technical leader.

Compensaciones / BeneficiosHybrid working model8 weeks teleworking per yearFlexible start/finish timesCareer plan development,



training and language learning supportNational and international mobilityRelocation package ResponsabilidadesDefine architecture for FPGA/SoC hardwareCode in VHDL/VerilogPerform advanced verification using SystemVerilog/UVMOptimize resources and timingDefine HW/SW interfacesMentor junior engineersProduce technical documentation Requisitos principalesExtensive FPGA development experienceAdvanced VHDL/Verilog, synthesis and verification tools (Vivado, Quartus, ModelSim, QuestaSim)Modular/IP design, timing optimization, high-speed interfacesC++ or Rust, Python, GitKnowledge of Process Automation, signal processing, HDL coder, soft core processors, DO-254, ECSSASIC design would be an assetWillingness to travel within Europementoring and coachingteam collaborationeffective communicationVHDLVerilogSystemVerilog/UVM

📌 Senior Hardware Design Engineer (FPGA) - tres cantos
🏢 Jobrapido
📍 Tres Cantos