Overview In this role, you develop and verify logic IPs (standard cells and IOs) to support SOC designs across analog, digital and mixed-signal domains. You will work within the Foundation IP group to enable robust library content used in design, routing, and P&R; flows. You will refine library QA processes, debug issues, and automate tasks through scripting. You’ll collaborate with cross-functional teams to drive reliable, scalable IPs that power advanced systems. This is a hands-on position in a fast-paced, innovation-driven environment that values clear communication and practical problem-solving.

ResponsabilidadesLogic cell and IO circuit design, simulation and layout creationLibrary characterizationLibrary view generation for digital,



analog and mixed-signal design and PnR flowsLibrary QA methodology development and executionDebugging library and design issuesProgramming and scripting for automation Requisitos principales3+ years of experienceMaster's degree in Electrical Engineering or equivalentStrong knowledge on circuit design, simulations and characterizationStrong knowledge on library view development and verificationFamiliar with analog, digital and mixed-signal design flowsGood at programming or scriptingStrong written and verbal communication skillscommunication skillscircuit design, simulations and characterizationlibrary view development and verificationanalog, digital and mixed-signal design flowsprogramming or scripting

📌 Foundation IP Development Engineer - valència (Valencia)
🏢 Jobrapido
📍 Valencia