Job Description Our client is expanding their High
Speed IO team and is looking for a Lead PCIe Engineer with strong
background in PCIe architecture and RTL implementation within SoC
or ASIC environments. In this role, you will define, design and
integrate PCIe subsystems for advanced semiconductor solutions. A
key focus will be the interaction between the PCIe subsystem and
processor cores using AMBA CHI based coherency. You will
collaborate closely with architecture, RTL, verification and
physical design teams to deliver scalable processor solutions.
Location : Barcelona, Spain - Hybrid Responsibilities: As a Lead
PCIe Engineer, your broad responsibilities will include but are not
limited to: • Define and implement PCIe architecture and RTL
solutions • Integrate PCIe IP within SoC or ASIC environments •
Ensure efficient interaction between PCIe subsystem and AMBA CHI
based cores • Work with AXI, CHI or AHB protocols where required •
Develop RTL using Verilog or VHDL • Support block level testing and
validation • Collaborate with architecture, verification and
physical design teams • Lead technical decisions for PCIe
subsystems • Own delivery and quality of PCIe blocks across project
milestones • Mentor engineers and support roadmap planning for PCIe
and related interfaces Requirements: • 6 plus years of industrial
experience for Lead level • Proven experience in PCIe design or
integration • Experience in SoC or ASIC environments • Experience




with AXI, CHI or AHB • Proficiency in RTL design using Verilog or
VHDL • Experience with block level testing • Strong analytical and
problem solving skills • English level C1 • Master or PhD is
preferred • Knowledge of C++ or scripting languages is a plus •
Knowledge of CXL is a plus • Experience with synthesis, timing, CDC
or lint is a plus Preferred / Valued knowledge: • Experience
working with RISC V architecture is highly valued, especially
within processor, SoC, RTL, verification, firmware, software, PCIe,
DDR, PCS, DFT, Physical Design or hardware environments. What’s in
it for you? Our client offers an exciting, challenging role in a
collaborative, dynamic environment. The right person will find many
career growth opportunities in their company, whether you want to
advance your technical skills or aspire to leadership in the
future. Benefits: Versátil working hours (office open between 7 AM
and 9 PM, employees manage their own schedule) Hybrid working model
One week per year work from anywhere 25 days annual leave plus
December 24 and 31 €150 per month food allowance (≈ €1800 per year
additional compensation) Private medical insurance One time
relocation bonus paid with the first salary Support with housing
search through an agency Visa support if required Relocation
support for family Virtual shares Language classes (Spanish,
English, Catalan) Tax incentive

📌 PCIe Engineer (Lead / RTL) (Cataluña)
🏢 Hireroo
📍 Cataluña