The TMRW Foundation SILICON in Barcelona, Spain, seeks a mid-senior Digital IC Designer to drive RTL design, verification, and implementation for cutting-edge IC projects.
Aunque la experiencia profesional y las cualificaciones son principal para este puesto, asegúrese de comprobar si posee las habilidades interpersonales preferibles antes de solicitar, si se requieren.
You will employ Cadence tools to meet performance, power, and area targets across complex digital blocks. xqbhyrx
Responsibilities include RTL coding in Verilog/VHDL, functional verification, and timing sign-off using Tempus, Genus, Innovus and NCLaunch/Incisive.
📌 Digital IC Designer: RTL, Cadence Expert, Timing (Madrid)
🏢 TMRW
📍 Madrid